文章目录

• 简介
• nop
• data32

简介

今天在看kernel的反汇编程序发现一个新鲜的指令：data32 nopw，从网上找着说是对函数的一个16字节对齐。
https://stackoverflow.com/questions/29871947/what-is-the-meaning-of-the-data32-data32-nopw-cs0x0rax-rax-1-instruction-i

就是下一个函数，的起始地址是从16字节对齐的地方开始。这样在两个函数之间添加的padding的指令就是这个data32，nop等。data32是

crash> dis 0xffffffffb19a0eb0
0xffffffffb19a0eb0 :     nopl   0x0(%rax,%rax,1) [FTRACE NOP]
0xffffffffb19a0eb5 :   mov    %gs:0x15c40,%rax
0xffffffffb19a0ebe :  mov    0x10(%rax),%eax
0xffffffffb19a0ec1 :  test   %eax,%eax
0xffffffffb19a0ec3 :  jne    0xffffffffb19a0edd 
0xffffffffb19a0ec5 :  xor    %edi,%edi
0xffffffffb19a0ec7 :  callq  0xffffffffb19a03c0 <__schedule>
0xffffffffb19a0ecc :  mov    %gs:0x15c40,%rax
0xffffffffb19a0ed5 :  mov    (%rax),%rax
0xffffffffb19a0ed8 :  test   $0x8,%al
0xffffffffb19a0eda :  jne    0xffffffffb19a0ec5 
0xffffffffb19a0edc :  retq
0xffffffffb19a0edd :  ud2
0xffffffffb19a0edf :  jmp    0xffffffffb19a0ec5 
0xffffffffb19a0ee1 :  data32 nopw %cs:0x0(%rax,%rax,1)
0xffffffffb19a0eec :  nopl   0x0(%rax)

nop

是空指令。所以可以将这一部分的反汇编忽略掉。不要引起误解。

data32

3.6.1 Operand Size and Address Size in 64-Bit Mode
这里有说默认的操作数大小是32比特位。而这里的66H，就是32bit prefix的含义：data32。
In 64-bit mode, the default address size is 64 bits and the default operand size is 32 bits. Defaults can be overridden
using prefixes. Address-size and operand-size prefixes allow mixing of 32/64-bit data and 32/64-bit
addresses on an instruction-by-instruction basis. Table 3-4 shows valid combinations of the 66H instruction prefix
and the REX.W prefix that may be used to specify operand-size overrides in 64-bit mode. Note that 16-bit
addresses are not supported in 64-bit mode.
REX prefixes consist of 4-bit fields that form 16 different values. The W-bit field in the REX prefixes is referred to as
REX.W. If the REX.W field is properly set, the prefix specifies an operand size override to 64 bits. Note that software
can still use the operand-size 66H prefix to toggle to a 16-bit operand size. However, setting REX.W takes precedence
over the operand-size prefix (66H) when both are used.
In the case of SSE/SSE2/SSE3/SSSE3 SIMD instructions: the 66H, F2H, and F3H prefixes are mandatory for
opcode extensions. In such a case, there is no interaction between a valid REX.W prefix and a 66H opcode extension
prefix.
See Chapter 2, “Instruction Format,” in the Intel® 64 and IA-32 Architectures Software Developer’s Manual,
Volume 2A.